Enterprise storage capacity requirements are growing consistently. At the same time, prices for flash storage units—e.g., SSDs (solid-state drive)—have decreased significantly in comparison to hard disk drive storage systems so that the industry demand for NAND flash-based memory has increased significantly. The cell density of such NAND flash memories is also ever-increasing and the number of bits storable per cell is also increasing—e.g., TLC (triple level cell) or QLC (quad level cell), etc.
Due to cycling, retention, read disturb, program disturb or other mechanisms that may be specific to the NAND flash cell technology (e.g., of type floating gate, as well as, charge trap), process technology (e.g., 2D or 3D), scaling node or other than the specific design factors, the programmed nominal threshold voltage (VTH) distributions to read out data from the memory cells may change permanently (e.g. due to program/erase cycling) or temporary (e.g. due to retention effects until the block is erased and programmed again) in a slow or fast manner.
Calibration of read voltage values refers to algorithms able to track the VTH changes and calculate an appropriate voltage offset to adjust the read voltages applied during the application of a read with an attempt to minimize the number of bit errors. FIG. 4 shows an example of a negative shift of the VTH distributions due to charge-loss over time.
Modern NAND flash memory systems write many blocks (each block comprises a plurality of memory pages) in parallel to achieve high write bandwidth. At the same time, modern high-capacity NAND flash devices have blocks with many pages, e.g., 1536 pages per block. As a result, it may happen that the programmed pages in the block may be read by the host via the memory controller before all pages in the block have been programmed. Thus, a mixture of programmed and un-programmed pages may exist within a block for a given time, which in general depends on the workload running in the host or the internal relocation activities, until the block is fully programmed. When not all the pages in a block have been programmed, the block is usually referred to as an open block or a partially programmed block. When all the pages in a block have been programmed, the block is usually referred to as a complete block or a fully programmed block.
Traditionally, calibration, either nominal (e.g., during regular intervals) or on-demand (e.g., due to an error increase above a predefined threshold value), of read voltages is applied to fully programmed blocks. However, in modern 3D NAND flash devices, the block size is large (e.g., 1532 pages or more), which means that, depending on the workload, the probability of a block to remain in an open state for longer time increases. Moreover, in modern 3D NAND flash devices the VTH changes due to retention or read disturb effects are rapid, which means that a block in an open state may need to be calibrated before it is fully programmed.